1. Field of the Invention
The present invention relates to an image processing apparatus, an image processing circuit, and an image processing method for executing an image processing operation.
The present application is based on Japanese Patent Application No. 2000-058639, which is incorporated herein by reference.
2. Description of the Related Art
As is well known in the technical field, as apparatuses for executing image processing operations, there are provided apparatuses for executing image processing operations in a software manner, and apparatuses equipped with image processing circuits (LSIs for image processing purposes) capable of executing image processing operations. As an example of the latter-mentioned apparatuses, for example, such an apparatus for executing a copying operation is known, while both a scanner and a printer are controlled in an integration manner. This type of known apparatus is equipped with an image processing circuit for converting image data output by the printer into image data which is suitably provided to be printed out.
The image processing circuit employed in such a known apparatus is arranged by coupling several sets of circuits used to execute specific image processing operations (will be referred to as “image processing modules” hereinafter). Also, each of these image processing modules is arranged by an h×h filter, and a circuit used to supply pixel data to this h×h filter. The h×h filter calculates one piece of image data based upon pixel data (pixel value) related to an h×h image (normally, symbol “h” being equal to 3, or 5), and outputs the calculated image data. The circuit contains a buffer capable of storing thereinto (h−1) lines of image data which is required to be processed.
The image processing apparatus equipped with the image processing circuit corresponds to such an apparatus that the size (namely, pixel number per one line) of the image data which can be processed is restricted by the image processing circuit. In other words, in order that this image processing apparatus may process image data having a larger size than the above-described image data size, the image processing circuit must be newly designed/manufactured.
Then, as previously explained, since the image processing circuit employs such a circuit arrangement in which the buffer capable of storing thereinto the (h−1) lines of image data is provided with respect to each of these image processing modules, an image processing circuit capable of executing a desirable image processing operation may not be manufactured by way of an one-chip LSI in such a case that a total number of pixels per one line contained in image data to be processed is large. In such a difficult case, the following cumbersome works have been necessarily carried out. That is to say, while plural sets of suitable image processing circuits are designed and manufactured, the image processing apparatus capable of mounting thereon these image processing circuits should be altered to finally obtain such a desirable image processing apparatus.